Overview



Original chips improve the performance of computer
Selected original chips, strict inspection process, 8-layer PCB board, stable performance.

Aluminum alloy vest for effective heat dissipation
Aluminum alloy vest, strong heat dissipation effect, low working temperature, more stable operation

Gold-plated craft gold finger
Gold plating process, stronger conductivity and corrosion resistance




At-a-glance



  • 8 bit pre-fetch

  • Command/Address (CA) parity

  • Command/Address latency (CAL)

  • Databus write cyclic redundancy check (CRC)

  • Fixed burst chop (BC) of 4 and burst length (BL) of 8 via the mode register set (MRS)

  • Fly-by topology

  • Gold edge contacts

  • On-board I2 serial presence-detect (SPD) EEPROM

  • PCB: Height 1.23” (31.25mm)

  • Per DRAM Addressability is supported

  • RoHS Compliant and Halogen-Free

  • Specially designed aluminum alloy heat Spreader

  • Temperature controlled refresh (TCR)

  • Terminated control command and address bus




Reasons to buy


  • 8 bit pre-fetch
  • Command/Address (CA) parity
  • Command/Address latency (CAL)
  • Databus write cyclic redundancy check (CRC)
  • Fixed burst chop (BC) of 4 and burst length (BL) of 8 via the mode register set (MRS)
  • Fly-by topology
  • Gold edge contacts
  • On-board I2 serial presence-detect (SPD) EEPROM
  • PCB: Height 1.23” (31.25mm)
  • Per DRAM Addressability is supported
  • RoHS Compliant and Halogen-Free
  • Specially designed aluminum alloy heat Spreader
  • Temperature controlled refresh (TCR)
  • Terminated control command and address bus

Specification


Technical Description: Netac NTSDD4P32SP-16R memory module 16 GB 1 x 16 GB DDR4 3200 MHz

Features
Lead plating:
Gold
Cooling type:The method used to cool the device or to cool the air around the device.
Heatsink
Memory voltage:The voltage (V) of the memory in the device.
1.35 V
Memory channels:
Single-channel
CAS latency:Column Address Strobe (CAS) latency, or CL, is the delay time between the moment a memory controller tells the memory module to access a particular memory column on a RAM module, and the moment the data from the given array location is available on the module's output pins. In general, the lower the CAS latency, the better.
16
ECC:ECC means Error Correction Code, and it is memory that is able to detect and correct some memory errors without user intervention.
No
Memory form factor:Design of the memory e.g. 240-pin DIMM, SO-DIMM.
288-pin DIMM
Component for:What this product is used as a part of (component for).
PC
Memory clock speed:The frequency at which the memory (e.g. RAM) runs.
3200 MHz
Internal memory type:The type of internal memory such as RAM, GDDR5.
DDR4
Memory layout (modules x size):
1 x 16 GB
Internal memory:A computer's memory which is directly accessible to the CPU.
16 GB
Buffered memory type:
Unregistered (unbuffered)

General
Type:Characteristics of the device.
Memory RAM

Operational conditions
Storage temperature (T-T):The minimum and maximum temperatures at which the product can be safely stored.
-55 - 100 °C
Operating temperature (T-T):The minimum and maximum temperatures at which the product can be safely operated.
0 - 85 °C

Sustainability
Sustainability compliance:
Yes
Doesn't contain:
Halogen

Technical details
Compliance certificates:
RoHS

Weight & dimensions
Height:The measurement of the product from head to foot or from base to top.
37.5 mm
Depth:The distance from the front to the back of something.
6.1 mm
Width:The measurement or extent of something from side to side.
137.5 mm


Product details


NTSDD4P32SP-16R NETAC 6926337231730

Netac NTSDD4P32SP-16R memory module 16 GB 1 x 16 GB DDR4 3200 MHz

£31.99 and In stock

SKUNTSDD4P32SP-16R

Netac NTSDD4P32SP-16R memory module 16 GB 1 x 16 GB DDR4 3200 MHz

Quick Code: Q544892 MPN: NTSDD4P32SP-16R
£26.66ex VAT

2 in stock
Quantity:
In Stock

Key Features

  • Specially designed aluminum alloy heat Spreader
  • On-board I2 serial presence-detect (SPD) EEPROM
  • Databus write cyclic redundancy check (CRC)
  • Temperature controlled refresh (TCR)
  • Command/Address (CA) parity
  • Per DRAM Addressability is supported